EDN

A primer for successful integration of complex hard IP in physical design

Despite the work done by various standards groups such as the VSIA, GSA IP group, and SPIRIT, IP integration still remains quite challenging. First, one has to select the right IP business model, ...
Design-Reuse

Integration Optimized SuperSpeed USB3.0 IP from Cadence - Delivering Superior Value to the SOC Designer

The Past-The SOC design of yesterday typically had a 70-80% Customer Differentiated Design elements, and 20%-30% of IP and Fabric that was reused. This model allowed third party IP vendors wearing the ...
Design-Reuse

A cost-effective and highly productive Framework for IP Integration in SoC using pre-defined language sensitive Editors (LSE) templates and effectively using System Verilog ...

This paper presents a cost-effective and efficient framework for IP Integration in SoC using pre-defined language sensitive Editors (LSE) like EMACS templates and effectively using System Verilog ...
EDN

Avoid signal-integrity blowouts in SOC-design IP-block integration

Many small and large design teams use third-party IP (intellectual property) to accelerate SOC (system-on-chip) design by importing functional blocks, such as data converters, PLLs, Ethernet PHY ...