Semiconductor Engineering

Logic Synthesis Basics For FPGA

In the early days of digital design, all circuits were designed manually. You would draw K-map, optimize the logic and draw the schematics. If you remember, we all ...
EDN

Mentor’s first wave of new FPGA synthesis tools targets 50 million gate designs

WILSONVILLE, Ore. — Three months after disclosing an ambitious plan to redefine design software for field programmable gate arrays, Mentor Graphics Corp. here is preparing to ship its first beta ...
EDN

Getting the most out of RTL logic synthesis

As chip designers, we take register-transfer-level logical synthesis for granted today. And that's a good thing. That means that we are all comfortable with it. I remember back in the early '90s when ...
Semiconductor Engineering

HW Security: Flip-Flops Along Logic Gates to Prevent Synthesis Tools’ Structural Leakages (TU Dresden, Ruhr Univ. Bochum)

A new technical paper titled “Flip-Lock: A Flip-Flop-Based Logic Locking Technique for Thwarting ML-based and Algorithmic Structural Attacks” was published by researchers at TU Dresden and Ruhr ...
Embedded

The four Rs of efficient system design

New design languages and new chips and systems mean a whole new set of design gotchas for today's developers. Once-simple tasks become difficult and, thankfully, once-difficult tasks become easy. This ...
Electronic Design

Synthesis Attacks The Abstract

HARDWARE DESIGN is a process of refining an idea from a highly abstract form to a concrete, physical implementation. Along the way, a design is continually transformed from a given state of ...