EDN

Frequency and phase locked loops

The purpose of a phase locked loop (PLL) is to generate a frequency and phase-locked output oscillation signal. To achieve this goal, prior art essentially functioned ...
EDN

Phase-Locked Loop Applications

This application note discusses phase frequency detector characteristics that affect phase-locked loop (PLL) dead band and jitter performance. In PLLs that employ charge pump loop filter designs the ...
Electronic Design

Phase-Noise Modeling, Simulation, and Propagation in Phase-Locked Loops (Part 3)

Some brief theory and typical measurements of phase noise. How to produce the lowest phase noise at a PLL output. A standard design procedure for a typical Type 2, second-order loop. As stated in ...
Design-Reuse

Fully Digital Implemented Phase Locked Loop

One of the most challenging tasks in analog circuit design is to adapt a functional block to ever new CMOS process technology. For digital circuits the number of gates per square mm approx. doubles ...
AZOM

Operation of MEMS Coriolis Vibratory Gyroscopes

This article discusses the various control mechanisms for MEMS Coriolis Vibratory Gyroscopes (CVG), and how they can be applied with the commercial off-the-shelf HF2LI Lock-in Amplifier. A MEMS ...
Electronics Weekly

Great phase-locked loop motor control app note

Related to my search for reduced motor noise (and thanks to all who have made suggestions – ‘scope avaunt this weekend), is a search for speed stability in that motor*. And to someone who is in love ...